Tu Transistor den CPU
Loi noi dau
May tinh "tu duy" nhu the nao? Ban co the biet CPU la "nao" cua may tinh, nhung nao nay thuc chat hoat dong ra sao? No tu kim loai va nhua lam sao thanh thiet bi thong minh co the thuc thi chuong trinh va xu ly du lieu? Chuong nay se dan ban tu transistor co ban nhat den khi hieu nguyen ly xay dung CPU.
Bai viet nay se giup ban hoc gi?
- Hieu thuat ngu: "tan so CPU", "da nhan", "tap lenh" khong con la bi an
- Goc nhin thuc thi code: thay mot dong code di qua fetch, decode, execute, writeback
- Tu duy lop truu tuong: hieu moi lop phuc vu lop tren nhu the nao
| Chuong | Noi dung | Khai niem cot loi |
|---|---|---|
| Chuong 1 | Transistor | Cong tac cua the gioi so |
| Chuong 2 | Cong logic | Thuc hien vat ly cua logic Boolean |
| Chuong 3 | Don vi chuc nang | Bo cong, thanh ghi, multiplexer |
| Chuong 4 | Nhan CPU | Fetch, decode, execute, writeback |
0. Toan canh: Tu cat den tri tue
Kha nang "tu duy" cua may tinh hien dai xuat phat tu dieu rat don gian: cong tac.
Khi dong dien chay qua cong tac, bieu dien la "1"; khi khong chay, la "0". Neu co hang ty cong tac nhu vay, va co the lam dau ra cua mot cong tac dieu khien cong tac khac, co the xay dung mang logic cuc ky phuc tap.
Tu cat den tri tue, co bon cap:
Phan tich tung lop
- Lop 1: Transistor (hang ty) -- "Cong tac" co ban nhat. MOSFET: ap dien vao cong cho dong chay giua nguon va thot
- Lop 2: Cong logic (hang ty) -- Transistor ket noi thanh AND, OR, NOT, XOR -- toan Boolean tren mach dien
- Lop 3: Don vi chuc nang (hang tram) -- To hop cong logic: bo cong, multiplexer, thanh ghi
- Lop 4: Nhan CPU (1-128 nhan) -- Trung tam chi huy: fetch, decode, execute, writeback
1. Transistor: Cong tac cua the gioi so
MOSFET transistor diagram -- click to toggle Gate voltage
Source
Source
Source
Gate0
Open -> output 0
Drain
Drain
Drain
👆 Click to toggle Gate voltage
1.1 Transistor la gi?
Transistor la thiet bi ban dan co the truu tuong thanh "cong tac" hoan hao:
- Nguon (Source) va Thot (Drain): nhu hai dau ong nuoc
- Cong (Gate): van dieu khien dong chay
Dieu khien bang dien ap thay bang tay. Khi mot cong tac co the duoc dieu khien boi tin hieu dien cua cong tac khac, chung ta da vuot qua khoang cach tu "can thiep nhan cong" den "tinh toan tu dong".
1.2 Bieu dien 0 va 1 nhu the nao?
- Dien ap cao (vd: 3.3V) = logic 1
- Dien ap thap (gan 0V) = logic 0
1.3 Tien hoa so luong transistor
| Nam | Xu ly | Transistor | Quy trinh |
|---|---|---|---|
| 1971 | Intel 4004 | 2,300 | 10um |
| 1993 | Intel Pentium | 3.1M | 800nm |
| 2006 | Core 2 Duo | 291M | 65nm |
| 2020 | Apple M1 | 16B | 5nm |
| 2023 | Apple M3 Max | 92B | 3nm |
2. Cong logic: Tinh toan bang cong tac
Four Basic Logic GatesThe building blocks of all digital computing
ANDAND gate
Operation:
A ∧ BOutputs 1 only when both inputs are 1
Series switches: both switches must be closed
Truth table
| A | B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
OROR gate
Operation:
A ∨ BOutputs 1 when at least one input is 1
Parallel switches: either switch can close the circuit
Truth table
| A | B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
NOTNOT gate
Operation:
¬AInverts the input: 0 becomes 1, 1 becomes 0
Inverter: on becomes off, off becomes on
Truth table
| A | Output |
|---|---|
| 0 | 1 |
| 1 | 0 |
XORXOR gate
Operation:
A ⊕ BOutputs 1 only when the two inputs are different
Difference detector: different means true
Truth table
| A | B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
Core idea: Logic gates turn physical circuit on/off states into mathematical true/false operations. They are the bridge from hardware to software logic.
2.1 Cong co ban
- AND: Tat ca dau vao phai la 1 thi dau ra moi la 1
- OR: Chi can mot dau vao la 1, dau ra la 1
- NOT: Dao nguoc dau vao
- XOR: Dau ra la 1 khi hai dau vao khac nhau
2.2 Cong bang cong logic
Mot XOR (tinh tong) + mot AND (tinh nho) = bo cong nua (Half Adder).
Half Adder -- Interactive DemoClick inputs A and B to see the result for one binary column
+=00
▲ Carry: pass a 1 to the column on the left ▲ Sum: the digit written in this column
0 + 0 = 0. Write 0 in this column, with no carry.
All possible cases
ABWrite (sum)Carry
0000
0110
1010
1101
Look closely at the table and two patterns appear:
- The sum column is 1 only when A and B are different. This is XOR.
- The carry column is 1 only when A and B are both 1. This is AND.
The circuit is connected like this:
A = 0
B = 0
XOR gate
Different -> 1
Output: 0
AND gate
All 1 -> 1
Output: 0
Sum
0
0
Carry
0
0
Bo cong nua chi nhan hai dau vao. De cong nhieu so can bo cong day du (Full Adder) nhan ba dau vao.
Full Adder -- Interactive DemoA full adder adds one more input: carry-in (Cin) from the lower bit. Click the three inputs to try it.
++=01
ABCarry-inCarrySum
1 + 0 + 0 = 1. Write 1 in this column, with no carry.
Compared with a half adder: A full adder adds a third input: carry-in (Cin). In multi-bit addition, each column adds A, B, and the carry from the column on the right.
All 8 cases (3 inputs -> 2³ = 8)
ABCinSumCarry
00000
00110
01010
01101
10010
10101
11001
11111
Inside a full adder = two half adders in series
Step 1: Half adder 1
First calculate A + B
A = 1B = 0
→
Intermediate sum: 1Carry 1: 0
▸
Step 2: Half adder 2
Add the intermediate sum and carry-in
Intermediate sum = 1Cin = 0
→
Sum: 1Carry 2: 0
▸
Step 3: Merge carries
If either carry path is 1, carry 1 into the next higher bit.
Carry 1 = 0Carry 2 = 0
→
Final carry: 0
Noi nhieu bo cong day du de cong nhieu bit:
Ripple Carry AdderCascade multiple full adders to perform multi-bit binary addition
CascadeLower-bit Cout connects to higher-bit Cin
RippleCarry propagates bit by bit like a wave
OverflowThe highest bit produces a carry beyond the range
Bits:
+=13
A0111(7)
B0110(6)
=1101(13)
Adder cascadeHover to inspect each bit calculation
Bit 0Half adder
A1B0
Sum1Cout0
Bit 1Full adder
A1B1Cin0
Sum0Cout1
Bit 2Full adder
A1B1Cin1
Sum1Cout1
Bit 3Full adder
A0B0Cin1
Sum1Cout0
Overall calculation
Input:A = 7 (0111), B = 6 (0110)
Process:Start at bit 0, compute each sum and carry, and propagate carries toward higher bits.
Result:1101 = 13
Core idea: Carry ripples from the lowest bit to the highest bit, which is why this circuit is called a ripple carry adder. More bits increase delay, but the circuit stays simple.
Complete Adder DemoFrom logic gates to multi-bit addition -- abstraction layer by layer
Layer 1: Logic gates
The basic operation units. Each gate performs one Boolean operation.
AND gateOutputs 1 only when all inputs are 1
OR gateOutputs 1 when any input is 1
XOR gateOutputs 1 when inputs differ
&
AND gateA AND B
0001
>=1
OR gateA OR B
0111
=1
XOR gateA XOR B
0110
1
NOT gateNOT A
10
Core idea: Logic gates turn voltage levels (0/1) into Boolean operations (false/true). They are where hardware starts implementing math.
Abstraction layers
Logic gates
→Half adder
→Full adder
→Multi-bit adder
→ALU/CPU
3. Don vi chuc nang: To hop cong logic
| Module | Nhiem vu | Vi du |
|---|---|---|
| Bo cong | Dong co so hoc | Ban tinh khong met |
| Multiplexer | Dieu khien luong du lieu | Nganh duong sat |
| Giai ma | Dich lenh nhi phan | Giai ma mat |
| Flip-Flop | Ghi trang thai | Can bang giu vi tri |
Common Functional Units -- switch modules to see how they work
Multiplexer (MUX): like a railway switch, it uses the select signal to decide which data input passes through.
Data 0 (D0)
Data 1 (D1)
MUX
Select (Sel)
Output (Out)0
The select signal is 0, so the output equals data 0 (D0): 0
3.1 Thanh ghi: Luu tru du lieu
CPU Register FileHigh-speed storage inside the CPU
Special Registers
PC
0x00401000
Program counter
IR
0x8B450008
Instruction register
MAR
0x00401000
Memory address register
MDR
0x00000000
Memory data register
ACC
0x0000001A
Accumulator
General Purpose Registers
RAX
0x00000000
Return value
RBX
0x00000000
Base register
RCX
0x00000000
Counter register
RDX
0x00000000
Data register
RSI
0x00000000
Source index
RDI
0x00000000
Destination index
RBP
0x00000000
Base pointer
RSP
0x7FFDE000
Stack pointer
Program Status Word (PSW / FLAGS)
CF0Carry flag
PF0Parity flag
AF0Auxiliary carry
ZF0Zero flag
SF0Sign flag
OF0Overflow flag
Registers vs Memory
| Feature | Register | Memory (RAM) |
|---|---|---|
| Location | Inside the CPU | Outside the CPU |
| Access speed | Fastest (< 1ns) | Slower (50-100ns) |
| Capacity | Tiny (bytes) | Large (GB) |
| Role | Hold instructions, operands, and results | Store programs and data |
Bo nho duoc tao bang phan hoi: dau ra quay lai dau vao, tao vong kin giu trang thai. Khi 32 hoac 64 flip-flop duoc xep hang duoi cung tin hieu dong ho, ta co thanh ghi.
From Flip-Flops to Registers: The Feedback Loop of Memory
Change the data and observe it: without a clock signal, the output feeds back to the input and the closed loop preserves memory.
Data Bus (Data Input)
1
0
1
0
Gate
4-bit Register (Stored State)
0
0
0
0
Control Center
Try changing the left-side input. The register value is locked while the feedback loop is closed.
4. Kien truc CPU: Tu don vi chuc nang den xu ly
4.1 Thanh phan chinh
- ALU: thuc hien phep toan
- Ngan thanh ghi: luu tru tam thoi sieu nhanh
- Bus noi bo: van chuyen du lieu giua cac module
- Don vi dieu khien: doc lenh, tao tin hieu dieu khien
CPU Internal Microarchitecture
Click a module to see its subcircuits and how it works
CPU Core (Central Processing Unit)
Address Bus
Data Bus
Control Unit
Program Counter (PC)
Instruction Register (IR)
Instruction Decoder
Clock Generator
Control signals ↓
Register File
General Registers R0-R3
Accumulator (ACC)
Arithmetic Logic Unit (ALU)
Adder Circuit
Status Flags
Control Bus
Click a module in the CPU diagram to explore its circuit-level implementation.
4.2 CPU thuc thi lenh nhu the nao?
- Fetch: Doc lenh tu bo nho
- Decode: Phan tich thuc hien phep toan gi
- Execute: Thuc hien phep toan tai ALU
- Write Back: Ghi ket qua vao thanh ghi hoac bo nho
Detailed CPU Instruction Cycle Demo
CPU
Control Unit CU
PC256Program Counter
IR—Instruction Register
MAR—Memory Address Register
MDR—Memory Data Register
Arithmetic Logic Unit ALU
ACC0Accumulator
—
General Register File
R00
R10
R20
R30
Address Bus
Data Bus
Control Bus
→
↔
→
Main Memory
▶0x100LOAD R0, [0x200]
0x101LOAD R1, #7
0x102ADD R0, R1
0x103STORE [0x201], R0
Data Area
0x51242
0x5130
Step 0 / 32
Click "Clock Pulse" to step through execution, or "Auto Run" to play continuously.
Pipeline: Tim hieu suat toi da
Thay vi cho mot lenh hoan thanh 4 buoc roi moi bat dau lenh tiep, pipeline cho phep chong lenh: trong khi lenh A thuc thi, B giai ma va C lay ve.
5. Tom tat: Qua cac lop truu tuong
- Vat ly macro: Cat (silic dioxide)
- Vat ly micro: Hang ty transistor
- Dai so so: Cong logic AND/OR/NOT
- Module vi kien truc: Don vi chuc nang
- Kien truc phuc tap: CPU
- Ung dung: Phan mem va Internet
suy nghi cuoi
Cong suc tinh toan chi la hang ty cong tac sap xep lai trong khong gian kin; theo nhung nhip dong ho, hoan thanh tinh toan phuc tap tren manh silic nho nay.
"Luong dan den chat luong" -- cau nay duoc chung minh lien tuc trong kien truc may tinh.
Doc them
- Sach kinh dien: "Computer Organization and Design" - Patterson & Hennessy
- Mo phong logic so: Xay dung bo cong 8 bit
- Kien truc nang cao: Cache da cap, thuc thi ngoai trinh tu, GPU
- Ngon ngu assembly: Hieu code cap cao thanh lenh may nhu the nao